Field effect transistor (FET) devices typically have a polysilicon gate electrode, silicon dioxide gate dielectric, and source and drain regions formed adjacent to the polysilicon gate electrode. A typical process of fabricating a FET includes growing a thin silicon dioxide gate dielectric on a silicon substrate and then forming the polysilicon gate electrode over the gate dielectric. Source and drain regions are then formed adjacent to the gate electrode. A FET gate length is defined as the distance under the polysilicon gate between the source and drain regions.